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Advanced Programmable Interrupt Controller

Advanced Programmable Interrupt Controller by Mike Rieker
Though I had originally wrote my APIC code over a year ago, I've been playing with it recently, so I thought I'd write about it. This is not a complete treatment, but it contains stuff that the docs for the chips don't seem to tell. There are basically two things here to consider. 1. Built into all recent x86 CPU chips (Pent Pro and up) is a thing called a Local APIC. It is addressed at physical addresses FEE00xxx. Actually, that is the default, it can be moved by programming the MSR that holds it base address. It has many fun things in it. The big thing is that you can interrupt other CPU's in a multiprocessor system. But if you just have a uniprocessor, there are useful things for it, too. The Local APIC is described in Chapter 7 of Volume 3 of the Intel processor books. 2. Some motherboards have an IO APIC on them. This is usually only found on multiprocessor boards. Functionally, it replaces the 8259's. You must essentially shut off the 8259's and turn on the IO APIC to use it. The IO APIC is typically located at physical address FEC00000, but may be moved by programming the north/southbridge chipset. The Intel chip number is 82093 and you can get the doc for it off of the Intel website.

What the Local APIC Is
As stated above, the Local APIC (LAPIC) is a circuit that is part of the CPU chip. It contains these basic elements: 1. A mechanism for generating interrupts 2. A mechanism for accepting interrupts 3. A timer If you have a multiprocessor system, the APIC's are wired together so they can communicate. So the LAPIC on CPU 0 can communicate with the LAPIC on CPU 1, etc.

What the IO APIC Is
This is a separate chip that is wired to the Local APIC's so it can forward interrupts on to the CPU chips. It is programmed similar to the 8259's but has more flexibility. It is wired to the same bus as the Local APIC's so it can communicate with them.

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